发明名称 |
METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION |
摘要 |
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate having two different topography areas adjacent to each other. A step-forming material (SFM) is deposited over the substrate. A patterned SFM is formed in the low topography area of the two areas. The formation of the patterned SFM provides a fairly planar surface across over the substrate. |
申请公布号 |
US2014080067(A1) |
申请公布日期 |
2014.03.20 |
申请号 |
US201213616802 |
申请日期 |
2012.09.14 |
申请人 |
CHEN CHUN-CHANG;YANG SHUN-SHING;WU CHUAN-LING;MO WANG-PEN;HSIEH HUNG-CHANG;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
CHEN CHUN-CHANG;YANG SHUN-SHING;WU CHUAN-LING;MO WANG-PEN;HSIEH HUNG-CHANG |
分类号 |
G03F7/20 |
主分类号 |
G03F7/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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