摘要 |
The invention concerns a memory device comprising at least one memory cell comprising: first and second transistors (102, 104) coupled between first and second storage nodes (106, 108) respectively and a first supply voltage, a control terminal of said first transistor being coupled to said second storage node, and a control terminal of said second transistor being coupled to said first storage node; first and second resistance switching elements (202, 204) coupled in series with said first and second transistors respectively; and control circuitry (308) adapted to apply, during a programming phase of the first resistance switching element, a second supply voltage to said second storage node to active said first transistor, and then to apply said second supply voltage to said first storage node to generate a first write current (IA) through said first transistor and said first resistance switching element. |