GALOIS FIELD CALCULATING CIRCUIT AND MEMORY DEVICE

摘要

The present invention relates to a Galois field arithmetic operation circuit which substitutes (2^m-1) number of elements expressed with a vector by m bits of a Galois field for an error position detection polynomial expression. The Galois field arithmetic operation circuit according to the present invention includes a base calculation unit which calculates m number of linear independent elements from the (2^m-1) number of elements and a linear development unit which calculates the (2^m-1-m) number of elements except the m number of elements from the (2^m-1) number of elements by the combination of the m number of elements. [Reference numerals] (330) Base calculation unit; (340) Linear development unit