发明名称
摘要 PROBLEM TO BE SOLVED: To provide a method for expanding a power shutdown area in an LSI and its program. SOLUTION: A power shutdown area expansion method includes: a first extraction process of extracting a latch circuit or an input port as a first node B from an input terminal A of a power shutdown area by trace, and extracting a latch circuit or an output port as a second node B' from an output terminal A' of a first isolation cell connected to the output terminal of a shutdown area by trace, with respect to a hardware description file in which circuit elements and net information are described; and a second extraction process of extracting a latch circuit or an output port as a third node C from the first node B by trace, and extracting a latch circuit or an input port as a fourth node C' from the second node B' by trace, with respect to a hardware description file in which circuit elements and net information are described. The method also includes a process of extracting a uselessly operating combinational circuit, and adding the circuit to the hardware description file and a power supply specification file, and moving an isolation cell. COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP5445346(B2) 申请公布日期 2014.03.19
申请号 JP20100138199 申请日期 2010.06.17
申请人 发明人
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04 主分类号 G06F17/50
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