发明名称 |
Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit |
摘要 |
In a level conversion circuit mounted in an integrated circuit device using a plurality of high- and low-voltage power supplies, the input to the differential inputs are provided. In a level-down circuit, MOS transistors that are not supplied with 3.3 V between the gate and drain and between the gate and source use a thin oxide layer. In a level-up circuit, a logic operation function is provided. |
申请公布号 |
US8674745(B2) |
申请公布日期 |
2014.03.18 |
申请号 |
US201213406715 |
申请日期 |
2012.02.28 |
申请人 |
TANAKA KAZUO;MIZUNO HIROYUKI;NISHIYAMA RIE;MIYAMOTO MANABU;RENESAS ELECTRONICS CORPORATION;HITACHI ULSI SYSTEMS CO., LTD. |
发明人 |
TANAKA KAZUO;MIZUNO HIROYUKI;NISHIYAMA RIE;MIYAMOTO MANABU |
分类号 |
H01L21/8234;H03L5/00;H01L27/088;H03K3/356;H03K19/0175;H03K19/0185 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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