发明名称 EVALUATION METHOD FOR SEMICONDUCTOR DEVICE AND EVALUATION DEVICE FOR SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide an evaluation method for a semiconductor device and an evaluation device for the semiconductor device which can improve evaluation accuracy of the semiconductor device.SOLUTION: An evaluation method for a semiconductor device related to an embodiment of the invention includes an outline extraction step, an outline division step, an amount of deviation acquisition step, an allowable range setting step, and an evaluation step. The outline extraction step extracts an outline of a pattern of the semiconductor device. The outline division step divides the outline extracted at the outline extraction step into a plurality of areas according to predetermined significance. The amount of deviation acquisition step acquires an amount of deviation of the outline of a pattern of the semiconductor device with respect to an outline of a preset referential pattern. The allowable range setting step sets an allowable range of an amount of deviation every area. The evaluation step compares the allowable range set at the allowable range setting step with an amount of deviation acquired at the amount of deviation acquisition step every area and evaluates the semiconductor device.
申请公布号 JP2014049573(A) 申请公布日期 2014.03.17
申请号 JP20120190539 申请日期 2012.08.30
申请人 TOSHIBA CORP 发明人 YOSHIDA KENJI
分类号 H01L21/66;G01B11/24;G01B15/04 主分类号 H01L21/66
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