| 摘要 |
<p>#CMT# #/CMT# Forming bonded semiconductor structure (180), comprises: (a) providing first substrate structure (120) comprising thin layer of material on thick substrate body (104); (b) forming through wafer interconnects (112) through thin layer; (c) bonding processed semiconductor structure over thin layer and electrically coupling conductive feature of processed structure; (d) bonding second substrate structure (182) over processed structure; (e) removing substrate body and leaving thin layer; and (f) electrically coupling through wafer interconnect to conductive feature of another structure. #CMT# : #/CMT# Forming a bonded semiconductor structure (180), comprises: (a) providing a first substrate structure (120) comprising a relatively thin layer of material on a relatively thick substrate body (104); (b) forming many through wafer interconnects (112) through the thin layer of material of the first substrate structure; (c) bonding at least one processed semiconductor structure over the thin layer of material of the first substrate structure on side opposite the relatively thick substrate body and electrically coupling at least one conductive feature of the processed semiconductor structure with at least one through wafer interconnect of the many through wafer interconnects; (d) bonding a second substrate structure (182) over the processed semiconductor structure on side opposite the first substrate structure; (e) removing the thick substrate body of the first substrate structure and leaving the thin layer of material of the first substrate structure bonded to the processed semiconductor structure; and (f) electrically coupling at least one through wafer interconnect of the through wafer interconnects to a conductive feature of another structure. An independent claim is also included for an intermediate structure formed during fabrication of a bonded semiconductor structure, comprising: a first substrate structure comprising many through wafer interconnects extending through the thin layer of material, and a thick substrate body temporarily bonded to the layer of material; many processed semiconductor structures electrically coupled to the through wafer interconnects; and the second substrate structure temporarily bonded over the processed semiconductor structures on a side opposite the first substrate structure. #CMT#USE : #/CMT# The method is useful for forming bonded semiconductor structure. #CMT#ADVANTAGE : #/CMT# The method: enables the reuse of second substrate structure; and provides the bonded semiconductor structure without forming warping and cracking. The redistribution layer provides the capability of forming a customized routing pattern, and eliminates fan-in limitations, thus providing flexibility for routing using standard complementary metal-oxide-semiconductor back end processing. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The figure shows a simplified cross-sectional view of the semiconductor structures and the formation of bonded semiconductor structure. 104 : Thick substrate body 112 : Through wafer interconnects 120 : First substrate structure 180 : Bonded semiconductor structure 182 : Second substrate structure #CMT#ELECTRONICS : #/CMT# Preferred Method: The method further comprises: removing the second substrate structure after the step (f); forming at least one redistribution layer over the thin layer of material of the first substrate structure on the side opposite the thick substrate body prior to step (c), and where the step (c) comprises bonding the processed semiconductor structure to the redistribution layer; selecting the another structure to comprise another processed semiconductor structure, a printed circuit board or a semiconductor-on-insulator substrate, preferably a silicon-on-insulator substrate; forming an additional many through wafer interconnects through the processed semiconductor structure after the step (c); and reusing at least one of the second substrate structure and the thick substrate body of the first substrate structure in the method. The step (a) further comprises temporarily bonding the thin layer of material to the thick substrate body, and the step (e) comprises separating the thick substrate body from the thin layer of material. The step (c) is carried out at a temperature or temperatures below 400[deg] C, using an ultra-low temperature direct bonding process. The step (c) comprises bonding many processed semiconductor structures over the thin layer of material of the first substrate structure, where at least some processed semiconductor structures of the many processed semiconductor structures are disposed: laterally beside one another along a common plane oriented parallel to a major surface of the first substrate structure; or vertically over one another along a common line oriented perpendicular to a major surface of the first substrate structure (preferred). Preferred Components: The first substrate structure comprises semiconductor-on-insulator substrate. The thin layer of material has an average thickness of = 10 nm. #CMT#EXAMPLE : #/CMT# No suitable example given.</p> |
