发明名称 Semiconductor plural gate lengths
摘要 Gate structures with different gate lengths and methods of manufacture are disclosed. The method includes forming a first gate structure with a first critical dimension, using a pattern of a mask. The method further includes forming a second gate structure with a second critical dimension, different than the first critical dimension of the first gate structure, using the pattern of the mask.
申请公布号 US2014070414(A1) 申请公布日期 2014.03.13
申请号 US201213608211 申请日期 2012.09.10
申请人 HARTIG MICHAEL J.;KANAKASABAPATHY SIVANANDA K.;SEO SOON-CHEON;SREENIVASAN RAGHAVASIMHAN;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 HARTIG MICHAEL J.;KANAKASABAPATHY SIVANANDA K.;SEO SOON-CHEON;SREENIVASAN RAGHAVASIMHAN
分类号 H01L21/283;H01L29/49 主分类号 H01L21/283
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