发明名称 VERIFYING PROCESSOR-SPARING FUNCTIONALITY IN A SIMULATION ENVIRONMENT
摘要 A simulation environment verifies processor-sparing functions in a simulated processor core. The simulation environment executes a first simulation for a simulated processor core. During the simulation, the simulation environment creates a simulation model dump file. At a later point in time, the simulation environment executes a second simulation for the simulated processor core. The simulation environment saves the state of the simulated processor core. The simulation environment then replaces the state of the simulated processor core by loading the previously created simulation model dump file. The simulation environment then sets the state of the simulated processor core to execute processor-sparing code and resumes the second simulation.
申请公布号 US2014074451(A1) 申请公布日期 2014.03.13
申请号 US201314079802 申请日期 2013.11.14
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 LETZ STEFAN;DEUTSCHLE JOERG;HOPPE BODO;STUECHELI ERICA;THOMPTO BRIAN W.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址