发明名称 |
TECHNIQUES FOR REDUCING INDUCTANCE IN THROUGH-DIE VIAS OF AN ELECTRONIC ASSEMBLY |
摘要 |
An electronic assembly includes a processor die assembly, a first die assembly, and a second die assembly. The first die assembly is positioned on a first side of the processor die assembly. The second die assembly is positioned on a second side of the processor die assembly opposite the first side of the processor die assembly. Through-die vias couple the first and second die assemblies to the processor die assembly. |
申请公布号 |
US2014071652(A1) |
申请公布日期 |
2014.03.13 |
申请号 |
US201213611076 |
申请日期 |
2012.09.12 |
申请人 |
MCSHANE MICHAEL B.;HESS KEVIN J.;PELLEY PERRY H.;STEPHENS TAB A.;FREESCALE SEMICONDUCTOR, INC. |
发明人 |
MCSHANE MICHAEL B.;HESS KEVIN J.;PELLEY PERRY H.;STEPHENS TAB A. |
分类号 |
H05K7/00 |
主分类号 |
H05K7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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