发明名称 |
METHOD, PROGRAM, AND APPARATUS FOR DESIGNING SEMICONDUCTOR DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To efficiently suppress characteristic variations of semiconductor devices.SOLUTION: A semiconductor device design apparatus includes: a storage unit 1 that stores layout parameters that are indexes of characteristic variations according to a layout pattern, for each of a plurality of macros; a macro arrangement unit 2 that automatically arranges the plurality of macros on a semiconductor chip during a floor plan process; a cost calculation unit 3 that calculates a cost indicating the degree of characteristic variations between adjacent macros out of the arranged plurality of macros, on the basis of the stored layout parameters of the plurality of macros; and a macro rearrangement unit 4 that rearranges any of the adjacent macros on the basis of the calculated cost. |
申请公布号 |
JP2014044560(A) |
申请公布日期 |
2014.03.13 |
申请号 |
JP20120186436 |
申请日期 |
2012.08.27 |
申请人 |
RENESAS ELECTRONICS CORP |
发明人 |
HIRABAYASHI KYOSUKE |
分类号 |
G06F17/50;H01L21/82;H01L21/822;H01L27/04 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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