发明名称 Dual-Path Fused Floating-Point Add-Subtract
摘要 A fused floating-point add-subtract unit includes far path logic, close path logic, and selection logic. The far path logic is configured to perform addition and subtraction operations on first and second significands of first and second operands, respectively, to produce a far path sum and a far path difference. The close path logic is configured to perform addition and subtraction operations on the first and second significands of the first and second operands, substantially concurrently with the addition and subtraction operations of the far path logic, to produce a close path sum and a close path difference. The selection logic selectively provides one of the far path sum and the close path sum as a significand of a sum output and one of the far path difference and the close path difference as a significand of a difference output.
申请公布号 US2014074903(A1) 申请公布日期 2014.03.13
申请号 US201213609224 申请日期 2012.09.10
申请人 SWARTZLANDER, JR. EARL E.;SOHN JONGWOOK;CROSSFIELD TECHNOLOGY LLC 发明人 SWARTZLANDER, JR. EARL E.;SOHN JONGWOOK
分类号 G06F17/10 主分类号 G06F17/10
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