发明名称
摘要 An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.
申请公布号 JP5442836(B2) 申请公布日期 2014.03.12
申请号 JP20120267996 申请日期 2012.12.07
申请人 发明人
分类号 H03K19/0175;H03K3/356 主分类号 H03K19/0175
代理机构 代理人
主权项
地址