| 摘要 |
A cylindrical multi-level storage DRAM cell and a method for manufacturing the same are disclosed. The multi-level storage DRAM cell of the present invention comprises: a semiconductor substrate; a wiring formed on the semiconductor substrate; a gate wiring formed on the wiring; a channel pillar formed to be penetrated through the gate wiring, in which the inner surface is embedded in a channel pillar layer, whereby a channel region can be formed in the channel pillar layer; and a multi-level storage including a first storage electrode layer and a second storage electrode layer arranged on the upper/lower multi-level, a storage reference layer in which reference electrode can be applied and arranged between the first storage electrode layer and the second storage electrode layer, and a first dielectric layer and a second dielectric layer in which the electric polarization is generated in an electrostatic field and formed in a boundary of the first storage electrode layer and the storage reference layer and the second storage electrode layer and the storage reference layer. According to the multi-level storage DRAM cell of the present invention, a sufficient storage capacity can be secured and a layout area can be reduced. Furthermore, a cell transistor is implemented in the multi-level storage DRAM cell to form the channel region in the channel pillar layer embedded inside the channel pillar formed by being penetrated through the gate wiring so that the amount of current leakage of the channel is significantly reduced. |
