发明名称 Reducing weak-erase type read disturb in 3D non-volatile memory
摘要 A read process for a 3D stacked memory device provides an optimum level of channel boosting for unselected memory strings, to repress both normal and weak-erase types of read disturbs. The channel is boosted by controlling of voltages of bit lines (Vbl), drain-side select gates (Vsgd_unsel), source-side select gates (Vsgs_unsel), a selected level (word line layer) of the memory device (Vcg_sel), and unselected levels of the memory device (Vcg_unsel). A channel can be boosted by initially making the drain-side and source-side select gates non-conductive, to allow capacitive coupling from an increasing Vcg_unsel. The drain-side and/or source-side select gates are then made conductive by raising Vsgd_unsel and/or Vsgs_unsel, interrupting the boosting. Additionally boosting can occur by making the drain-side and/or source-side select gates non-conductive again while Vcg_unsel is still increasing. Or, the channel can be driven at Vbl. Two-step boosting drives the channel at Vbl, then provides boosting by capacitive coupling.
申请公布号 US8670285(B2) 申请公布日期 2014.03.11
申请号 US201213364518 申请日期 2012.02.02
申请人 DONG YINGDA;MUI MAN L;MIWA HITOSHI;SANDISK TECHNOLOGIES INC. 发明人 DONG YINGDA;MUI MAN L;MIWA HITOSHI
分类号 G11C7/02 主分类号 G11C7/02
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