| 摘要 |
The present invention relates to a semiconductor device which is a technology to detect the connectivity of a through silicon via (TSV) at a wafer level. The present invention includes a first wire formed at the upper portion of a TSV, a second wire formed at the upper portion of the first wire, a first power line and a second power line formed on the same layer with the second wire. Accordingly, the present invention can reduce unnecessary costs and time consumption to package a failed chip by allowing a user to screen the connectivity between chips after packging and the connectivity between the TSV and the chip at a wafer level. [Reference numerals] (AA) Y axis |
