发明名称 METHOD FOR DEAD-LOCK AVOIDANCE FOR 2-PROCESSOR DATA COMMUNICATION SYSTEM
摘要 A method for avoiding deadlock in an inter-processor data processing system is provided to avoid the deadlock caused by address collision in a DPRAM(Dual Port RAM) and avoid communication disconnection between processors owing to the deadlock by continuously writing new data to a DPRAM area having a damaged flag even if the flag has a different value from predetermined two values. It is checked whether or not a flag value written in a flag area of a DPRM Queue is the flag value representing write completion of a sender side processor(201). Data is written to a data area of the corresponding DRM queue by interpreting the flag value as the flag value translating into the flag value representing write completion when the flag value does not represent the write completion(205). It is waited until the flag value represents the flag value excluding the flag value representing the write completion when the flag value represents the write completion.
申请公布号 KR101371506(B1) 申请公布日期 2014.03.11
申请号 KR20060118053 申请日期 2006.11.28
申请人 发明人
分类号 G06F12/00;G06F12/06;G06F13/16 主分类号 G06F12/00
代理机构 代理人
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