| 摘要 |
The present invention relates to an integrated circuit for synchronizing an input signal to a clock signal which comprises: a first input unit for receiving an input signal in response to a first edge of a clock signal; a second input unit for receiving the input signal in response to a second edge of the clock signal; a first latching unit for latching an output signal of the first input unit in response to the second edge of the clock signal; a second latching unit for latching an output signal of the second input unit in response to the first edge of the clock signal; a first output unit for outputting the output signal of the first latching unit by synchronizing the output signal of the first latching unit to the second edge; and a second output unit for outputting the output signal of the second latching unit by synchronizing the output signal of the second latching unit to the first edge. |
