发明名称 Interpolator and designing method thereof
摘要 Interpolation of signed values A and B is efficiently performed by simple circuitry. To calculate an interpolated value C based on a 4-bit values A (bits a3a2a1a0) and B (bits b3b2b1b0) expressing a negative number by twos complement notation and a 4-bit interpolation rate D (bits d3d2d1d0) consisting of only a decimal part, a basic expression of C=(1-D)*A+D*B is transformed into an expression composed of an unsigned part that includes a sum of products with a bit di or a logically inverted value ei of the bit di (i=0, 1, 2, and 3), and indicates an absolute value of the interpolated value C, and a signed part indicating a sign of the interpolated value C. Then, 7 bits of bits c6 through c0 are generated from an arithmetic operation of the unsigned part, and logic judgement of the signed part is performed by considering a carry from the digit of the bit c6 of the arithmetic operation of the unsigned part to generate a bit c7. Significant digits of the obtained 8-bit value (bits c7 through c0) are outputted as an interpolated value.
申请公布号 US8671126(B2) 申请公布日期 2014.03.11
申请号 US20100917655 申请日期 2010.11.02
申请人 TONOMURA MOTONOBU;YOSHINO KYOUJI;DAI NIPPON PRINTING CO., LTD. 发明人 TONOMURA MOTONOBU;YOSHINO KYOUJI
分类号 G06F17/17 主分类号 G06F17/17
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