| 摘要 |
<p>The present invention relates to a semiconductor device and a method for fabricating the same. According to the present technique, the semiconductor device comprises: a substrate which has a cell region and a peripheral circuit region; a buried gate which is formed in the substrate of the cell region; a bit line which is formed on the substrate of the cell region and includes a first barrier layer; and a gate electrode which is formed on the substrate of the peripheral circuit region and includes a second barrier layer and a third barrier layer. The present technique reduces the height of the bit line, which decreases the parasitic capacitance of the bit line and increases the bit line sensing margin. [Reference numerals] (AA) Cell region; (BB) Peripheral circuit region</p> |
