| 摘要 |
<p>The present technique provides a 3D semiconductor device capable of restraining a floating body effect of a vertical channel transistor and reducing a level of difficulty, and a method of manufacturing the same. The 3D semiconductor device includes a first semiconductor wafer including a first bonding layer; a second semiconductor wafer formed by stacking a vertical gate, a bit line and a second bonding layer on a semiconductor substrate, wherein the second bonding layer is bonded to the first bonding layer of the first semiconductor wafer, and the vertical gate includes source/drain areas and a vertical channel. The source area includes a semiconductor device serving as a charge trap layer. The semiconductor wafer on which the bit line is stacked is formed on the vertical gate. The semiconductor device is formed by using a wafer bonding scheme, so that the level of process difficulty is reduced. The source area of the vertical gate is formed as the charge trap layer, so that the floating body effect of the vertical gate and the refreshing property are improved.</p> |
