发明名称 Hybrid Gate Process for Fabricating FinFET Device
摘要 Provided is a method of fabricating a semiconductor device that includes forming first and second fins over first and second regions of a substrate, forming first and second gate structures over the first and second fins, the first and second gate structures including first and second poly gates, forming an inter-level dielectric (ILD) over the substrate, performing a chemical mechanical polishing on the ILD to expose the first and second poly gates, forming a mask to protect the first poly gate of the first gate structure, removing the second poly gate thereby forming a first trench, removing the mask, partially removing the first poly gate thereby forming a second trench, forming a work function metal layer partially filling the first and second trenches, forming a fill metal layer filling a remainder of the first and second trenches, and removing the metal layers outside the first and second trenches.
申请公布号 US2014061817(A1) 申请公布日期 2014.03.06
申请号 US201314083533 申请日期 2013.11.19
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 GAN TIAN-CHOY;LIN HSIEN-CHIN;LIN CHIA-PIN;LIN SHYUE-SHYH;CHEN LI-SHIUN;LIAO SHIN HSIEN
分类号 H01L27/092;H01L21/8238 主分类号 H01L27/092
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