发明名称 |
Cap and Substrate Electrical Connection at Wafer Level |
摘要 |
A cap and substrate having an electrical connection at a wafer level includes providing a substrate and forming an electrically conductive ground structure in the substrate and electrically coupled to the substrate. An electrically conductive path to the ground structure is formed in the substrate. A top cap is then provided, wherein the top cap includes an electrically conductive surface. The top cap is bonded to the substrate so that the electrically conductive surface of the top cap is electrically coupled to the path to the ground structure. |
申请公布号 |
US2014061730(A1) |
申请公布日期 |
2014.03.06 |
申请号 |
US201314087887 |
申请日期 |
2013.11.22 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
PENG JUNG-HUEI |
分类号 |
B81B7/00;B81B3/00 |
主分类号 |
B81B7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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