发明名称 |
METHOD FOR POST DECOMPOSITION DENSITY BALANCING IN INTEGRATED CIRCUIT LAYOUTS, RELATED SYSTEM AND PROGRAM PRODUCT |
摘要 |
Embodiments of the invention provide a method of modifying a decomposed integrated circuit (IC) layout. The method includes providing a decomposed IC layout, the decomposed IC layout including a set of colors; determining a density of each color in the decomposed IC layout, wherein each color includes a plurality of features formed by a related exposure; separating the decomposed IC layout into a set of tiles; determining a first color with a minimum density in one tile of the set of tiles and a second color with a maximum density in tile, the first color including a first set of first features and the second color including a first set of second features; and replacing the first set of second features on the tile with a second set of first features, and the first set of first features on the tile with a second set of second features. |
申请公布号 |
US2014065728(A1) |
申请公布日期 |
2014.03.06 |
申请号 |
US201213596126 |
申请日期 |
2012.08.28 |
申请人 |
AGARWAL KANAK B.;BANERJEE SHAYAK;LIEBMANN LARS W.;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
AGARWAL KANAK B.;BANERJEE SHAYAK;LIEBMANN LARS W. |
分类号 |
H01L21/66;G05B19/418 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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