VOLATGE CONVERTING APPARATUS AND SUB-HARMONIC DETECTOR THEREOF

摘要

A voltage converting apparatus and a sub-harmonic detector are disclosed. The sub-harmonic detector includes a pulse eliminating circuit, a counter, and a comparator. The pulse eliminating circuit receives a pulse width modulation (PWM) signal and a reference PWM signal having a same period. The PWM signal and reference PWM signal has a plurality of pulses and reference pulses respectively. The pulse eliminating circuit eliminates at least one part of the pulses which overlap with the reference pulses for generating a processed signal. The counter counts the processed signal and the PWM signal during a time period to obtain first and second counting values. The comparator compares the first and second counting values for detecting whether a sub-harmonic condition happens or not in the PWM signal.