发明名称 DATA PROCESSOR
摘要 PROBLEM TO BE SOLVED: To achieve the synchronizing processing of a loop program, and to suppress the abnormal increase of a packet in a data driving architecture based on a packet including an instruction string.SOLUTION: An MCE 300 is provided with a loop control section 308, and a packet including a "done" instruction for reporting the completion of each loop processing of a loop program as the next instruction is sent to the loop control section 308, and each time the loop control section 308 calculates the upper limit value of a loop ID from the degree of progress of the loop processing, and broadcasts the upper limit value to all PE. A packet generation section of the PE limits the generation of a packet necessary for the loop processing within the loop ID such that it is possible to properly suppress the number of packets while maintaining high speed property. Also, the final "done" packet of the loop program which has reached the loop control section 308 is allowed to pass, and the previous "done" packets are deleted such that it is possible to synchronize the loop program and the following processing.
申请公布号 JP2014041640(A) 申请公布日期 2014.03.06
申请号 JP20130214320 申请日期 2013.10.15
申请人 MUSHANO MITSURU 发明人 MUSHANO MITSURU
分类号 G06F15/82;G06F9/32;G06F9/38 主分类号 G06F15/82
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