发明名称 FORMAL VERIFICATION OF BOOTH MULTIPLIERS
摘要 Disclosed below are representative embodiments of methods, apparatus, and systems for performing formal verification. For example, certain embodiments can be used to formally verify a Booth multiplier. For instance, in one example embodiment, a specification of a Booth multiplier circuit is received; an initial model checking operation is performed for a smaller version of the Booth multiplier circuit; a series of subsequent model checking operations are performed for versions of the Booth multiplier circuit that are incrementally larger than the smaller version of the Booth multiplier circuit, wherein, for each incrementally larger Booth multiplier circuit, two or more model checking operations are performed, the two or more model checking operations representing decomposed proof obligations for showing; and a verification result of the Booth multiplier circuit is output.
申请公布号 US2014067897(A1) 申请公布日期 2014.03.06
申请号 US201314019365 申请日期 2013.09.05
申请人 CALYPTO DESIGN SYSTEMS, INC. 发明人 CASE MICHAEL L.
分类号 G06F17/10 主分类号 G06F17/10
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