发明名称 SYSTEMS AND METHODS FOR DETECTING AND MITIGATING PROGRAMMABLE LOGIC DEVICE TAMPERING
摘要 <p>Systems and methods are disclosed for preventing tampering of a programmable integrated circuit device. Generally, programmable devices, such as FPGAs, have two stages of operation; a configuration stage and a user mode stage. To prevent tampering and/or reverse engineering of a programmable device, various anti-tampering techniques may be employed during either stage of operation to disable the device and/or erase sensitive information stored on the device once tampering is suspected. One type of tampering involves bombarding the device with a number of false configuration attempts in order to decipher encrypted data. By utilizing a dirty bit and a sticky error counter, the device can keep track of the number of failed configuration attempts that have occurred and initiate anti-tampering operations when tampering is suspected while the device is still in the configuration stage of operation.</p>
申请公布号 EP2702690(A2) 申请公布日期 2014.03.05
申请号 EP20120776082 申请日期 2012.04.13
申请人 ALTERA CORPORATION 发明人 PEDERSEN, BRUCE, B.
分类号 G06F21/86;G06F21/76;H03K19/177 主分类号 G06F21/86
代理机构 代理人
主权项
地址