发明名称
摘要 The present invention relates to a method for testing cryptography circuits. It also relates to a secure cryptography circuit capable of being tested. The cryptography circuit includes registers and logic gates, and a test thereof performs a differential power analysis on the registers of the circuit. A cryptography circuit being secure and including a first half-circuit associated with a second half-circuit operating in complementary logic, the electric power supply of the first half-circuit is separated from the electric power supply of the second half-circuit, the differential power analysis being carried out in parallel on each half-circuit, the two power supplies being combined into one and the same electric power supply after the test.
申请公布号 JP5433904(B2) 申请公布日期 2014.03.05
申请号 JP20100547153 申请日期 2009.02.11
申请人 发明人
分类号 G09C1/00;G06F21/55;G06F21/75;H04L9/10;H04L9/36 主分类号 G09C1/00
代理机构 代理人
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