| 摘要 |
The invention proposes a method for forming a vertical electrical connection (50) in a layered semiconductor structure (1), comprising the following steps:
- providing (100) a layered semiconductor structure (1), said layered semiconductor structure (1) comprising:
- a support substrate (20) including an first surface (22) and a second surface (24),
- an insulating layer (30) overlying the first surface (22) of the support substrate (20), and
- at least one device structure (40) formed in the insulating layer (30); and
- drilling (300) a via (50) from the second surface of the support substrate (20) up to the device structure (40), in order to expose the device structure (40);
characterized in that drilling (300) of the insulating layer is at least performed by wet etching (320). |
