Reduction of the sensitivity of jitter demodulation of a sampling clock signal

摘要

The invention relates to a method for the demodulation of a radiofrequency signal (Y), that comprises the steps of: providing a synchronous sampling clock signal (HE) of said radiofrequency signal to be demodulated; sampling said radiofrequency signal using said sampling clock signal; and processing the samples thus obtained in order to determine the phase and/or amplitude of said radiofrequency signal; characterized in that it further comprises the step of adjusting the phase, as measured relative to the sampling clock signal, of said signal to be demodulated and/or of a synchronous reference signal (R) relative to which the signal is demodulated in order to minimize the phase and/or amplitude error generated by a jitter of said sampling clock signal. The invention also relates to a demodulator circuit for implementing said method.