Method of adjusting the threshold voltage of a transistor by buried trapping layers.

摘要

The sub-assembly has an insulating layer (105) with a trapping zone (220) at a preset depth, and formed of a nitride or poly-silicon trapping layer between two oxide layers. The zone is extended below a gate of a MOS transistor (110) carried by an upper semiconductor layer (103), and has traps with a density higher than that of traps formed outside the zone. The semiconductor layer and the zone are in capacitive coupling. The traps are constituted of nano-crystals having atoms of silicon, germanium, metal or semiconductor/metal alloy, or formed by implantation of fluorine/nitrogen atoms. An independent claim is also included for a method for forming an electronic sub-assembly.