Function symmetry-based optimization for physical synthesis of programmable integrated circuits

摘要

A computer-implemented method of technology mapping a circuit design for implementation within a programmable logic device can include determining a plurality of cut sets for the circuit design, wherein each cut set includes a plurality of cuts. The method can include evaluating each cut set according to a cost function that depends, at least in part, upon a measure of inter-cut symmetry and selecting a cut set according to the cost function. Each cut of the selected cut set can represent an instantiation of at least one logic component within the programmable logic device. The circuit design specifying the selected cut set can be output.