发明名称 |
Pulse output circuit, shift register and display device |
摘要 |
A pulse is input to first and second TFTs to turn ON the first and second TFTs so that the potential of a node a rises. When the potential of the node a reaches (VDD-VthN), the node alpha enters a floating state. Accordingly, a third TFT then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the third TFT further rises due to an operation of capacitance as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the third TFT. |
申请公布号 |
US8665197(B2) |
申请公布日期 |
2014.03.04 |
申请号 |
US201213604709 |
申请日期 |
2012.09.06 |
申请人 |
AZAMI MUNEHIRO;NAGAO SHOU;TANADA YOSHIFUMI;SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
AZAMI MUNEHIRO;NAGAO SHOU;TANADA YOSHIFUMI |
分类号 |
G02F1/133;G09G3/36;G09G3/20;G09G3/30;G11C19/00;G11C19/28;H03K19/0175 |
主分类号 |
G02F1/133 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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