| 摘要 |
<p>The invention relates to a power transistor for protecting, by limiting current, an electrical power supply, including one or more basic power vertical-junction field-effect transistors (602). Each basic power vertical junction field-effect transistor (602) includes at least one semiconductor depletion region (618, 620) forming a partially buried gate that defines a vertical channel (622) inside a first region (612). Each basic transistor includes a semiconductor depletion region (618, 620) forming an upper surface gate that is not buried, and defining a side channel inside a region (612) vertically adjacent to the first region.</p> |
