发明名称 LAYER INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a layer integrated circuit capable of supplying power to any surface position of each chip even when chips are stacked one on top of another and usable for a circuit consuming a large amount of power, as well as capable of high speed communication between the chips by only forming one or two conductive coupling coils per chip for one communication channel.SOLUTION: A chip 1 and a chip 2 have their reverse sides bonded together by an adhesive 12 while they are stacked one on top of another, at which time a coil 1 and a coil 2 are disposed at inductive coupling positions. A chip 3 and a chip 4 are stacked in the same way. The chip 2 and the chip 3 have their surfaces facing each other across a circuit board while they are stacked. The chip 2 and the chip 3 communicate by a bump-connected power supply line 13. Power supply to the chips 1 and 4 and the circuit board is sourced from a package board by bonding wire 11. For the chip 1, a power supply line is wired by the bonding wire 11 from the reverse side of the package board through a hole opened in the package board.
申请公布号 JP2014038880(A) 申请公布日期 2014.02.27
申请号 JP20120178719 申请日期 2012.08.10
申请人 KEIO GIJUKU 发明人 KURODA TADAHIRO
分类号 H01L25/18;H01L25/00;H01L25/065;H01L25/07 主分类号 H01L25/18
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