MULTIPORT MEMORY EMULATION USING SINGLE-PORT MEMORY DEVICES

摘要

A multiport memory emulator (200) has an input buffer (202) that receives first and second memory commands for concurrent processing in one operation clock cycle. Data operands are stored in a memory array of bitcells (210) that is arranged as rows and memory banks. An auxiliary memory bank provides a bitcell for physically storing an additional word for each row. The bank address portion of each of the first and second memory commands is respectively translated into a first and second physical bank address. The second physical bank address is assigned a bank address of a bank that is currently unused in response to a determination that the bank address portions are equal and the bank associated with the first bank address is designated as a currently unused bank for subsequently received memory commands in response to the determination that the bank address portions are equal. Simultaneous read and write operations are possible.