发明名称 |
Arrays Comprising Vertically-Oriented Transistors, Integrated Circuitry Comprising A Conductive Line Buried In Silicon-Comprising Semiconductor Material, Methods Of Forming A Plurality Of Conductive Lines Buried In Silicon-Comprising Semiconductor Material, And Methods Of Forming An Array Comprising Vertically-Oriented Transistors |
摘要 |
An array includes vertically-oriented transistors, rows of access lines, and columns of data/sense lines. Individual of the rows include an access line interconnecting transistors in that row. Individual of the columns include a data/sense line interconnecting transistors in that column. The data/sense line has silicon-comprising semiconductor material between the transistors in that column that is conductively-doped n-type with at least one of As and Sb. The conductively-doped semiconductor material of the data/sense line includes a conductivity-neutral dopant between the transistors in that column. Methods are disclosed. |
申请公布号 |
US2014054677(A1) |
申请公布日期 |
2014.02.27 |
申请号 |
US201213591065 |
申请日期 |
2012.08.21 |
申请人 |
HU YONGJUN JEFF;MCTEER ALLEN;MICRON TECHNOLOGY, INC. |
发明人 |
HU YONGJUN JEFF;MCTEER ALLEN |
分类号 |
H01L21/265;H01L21/336;H01L27/088 |
主分类号 |
H01L21/265 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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