| 摘要 |
PROBLEM TO BE SOLVED: To improve performance corresponding to an increase in the number of cores.SOLUTION: An arithmetic processing unit to be disclosed is an arithmetic processing unit in which, in one aspect, a plurality of nodes having a core part and a cache memory are arranged in the shape of a tile in an X-axis direction and in a Y-axis direction, and has a first connection part and a second connection part. The first connection part respectively connects the plurality of nodes in the shape of a ring in the X-axis direction. The second connection part respectively connects the plurality of nodes in the shape of a ring in the Y-axis direction. A cache memory included in the plurality of nodes is subjected to bank division in the Y-axis direction, and is shared among the plurality of nodes, the uniformity of the cache memory being controlled by a snoop system in the X-axis direction. |
