发明名称 VIAS IN POROUS SUBSTRATES
摘要 <p>A microelectronic unit can include a substrate having front and rear surfaces and active semiconductor devices therein, the substrate having a plurality of openings arranged in a symmetric or asymmetric distribution across an area of the rear surface, first and second conductive vias connected to first and second pads exposed at the front surface, pluralities of first and second conductive interconnects extending within respective ones of the openings, and first and second conductive contacts exposed for interconnection with an external element. The plurality of first conductive interconnects can be separated from the plurality of second conductive interconnects by at least one of the plurality of openings, the at least one opening at least partially filled with an insulating material. The distribution of the openings can include at least m openings spaced apart in a first direction and n openings spaced apart in a second direction transverse to the first direction.</p>
申请公布号 EP2700092(A1) 申请公布日期 2014.02.26
申请号 EP20120719537 申请日期 2012.04.18
申请人 TESSERA, INC. 发明人 MOHAMMED, ILYAS;HABA, BELGACEM;UZOH, CYPRIAN;SAVALIA, PIYUSH
分类号 H01L21/768;H01L23/48;H01L23/498 主分类号 H01L21/768
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