发明名称 Verification support apparatus, verifying apparatus, computer product, verification support method, and verifying method
摘要 A verification support apparatus includes a detecting unit that detects an inconsistency between a simulation result at an observation point in a circuit-under-test and an expected value; a setting unit that sets a portion of output values to logic values different from those of the simulation result when the detecting unit detects the inconsistency, wherein the output values are random values output from elements that receive a signal in a second clock domain that receives the signal from a first clock domain asynchronously; a comparing unit that compares the expected value and a simulation result at the observation point after the setting by the setting unit; and an identifying unit that identifies whether the portion of the output values are a cause of the inconsistency, based on a result of comparison by the comparing unit.
申请公布号 US8661384(B2) 申请公布日期 2014.02.25
申请号 US201113298354 申请日期 2011.11.17
申请人 IWASHITA HIROAKI;FUJITSU LIMITED 发明人 IWASHITA HIROAKI
分类号 G06F17/50 主分类号 G06F17/50
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