发明名称 VLSI black-box verification
摘要 A circuit verifier scans through a description of an integrated circuit to identify black-boxes in the description. The verifier assigns the identified black-boxes to clock domains and identifies clock domain crossings, in which a black-box assigned to a first clock domain is connected to an element belonging to a second clock domain. In some cases the verifier identifies signal reconvergence through black-boxes.
申请公布号 US8661383(B1) 申请公布日期 2014.02.25
申请号 US201213557215 申请日期 2012.07.25
申请人 DOBKIN ROSTISLAV (REUVEN);BROOK LEONID;VSYNC CIRCUITS, LTD. 发明人 DOBKIN ROSTISLAV (REUVEN);BROOK LEONID
分类号 G06F17/50 主分类号 G06F17/50
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