| 摘要 |
A parallel flash memory controller, a chip, and a control method thereof are disclosed. First, an on-chip control bus sends flash memory control instructions in parallel to instruction parsing units (211) according to channels. Next, the instruction parsing units store (211) and parse the flash memory instructions corresponding to the flash memory channels, and sequentially send the flash memory control instruction to the flash memory control units (213). Then, the flash memory control units (213) send control instructions to the flash chips in the channels according to rows, and then the control instructions are processed in parallel in flash memory rows. In the present invention, the operations for each channel are performed independently in parallel, the flash memory control units (213) in the channels send the control instructions in series, and meanwhile, in each flash memory row, operations are concurrently performed in parallel. Therefore, the read/write rate of the flash memory is increased for many times, and the bottleneck in adopting flash memory chips to accomplish high-speed and large-capacity storage devices is effectively eliminated. |
