发明名称 ANALOG MULTIPLIER CIRCUIT, VARIABLE GAIN AMPLIFIER, DETECTOR CIRCUIT, AND PHYSICAL QUANTITY SENSOR
摘要 Provided is a technology capable of preventing arithmetic operation accuracy from deteriorating even when a bipolar transistor used to form a Gilbert multiplier core has poor characteristics. A correction current generating circuit (3) uses a constant current source (301) to feed a constant current I0 to an emitter of a bipolar transistor (Q7) being a first replica transistor having the same current gain alpha as bipolar transistors (Q1 to Q4) that form the Gilbert multiplier core (101), to generate a current of alpha·I0 on a collector side thereof. The current is output as a correction current alpha·I0, and is added to each of one of input signals (±K1·Vy) of the Gilbert multiplier core (101) as a bias current, to thereby eliminate influence of the current gain alpha on an output signal being a multiplication result.
申请公布号 US2014047920(A1) 申请公布日期 2014.02.20
申请号 US201214114109 申请日期 2012.04.25
申请人 NAGATA YOICHI 发明人 NAGATA YOICHI
分类号 G06G7/00;G01C19/5776 主分类号 G06G7/00
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