摘要 |
<p>A semiconductor device comprises a substrate (1), a cushioning layer (2) on the substrate, a counter-doping isolation layer (3) on the cushioning layer, a barrier layer (4) on the counter-doping isolation layer, a channel layer (5) on the barrier layer, a gate stack structure (7) on the channel layer, and a source/drain region (8) at two sides of the gate stack structure, the cushioning layer and /or the counter-doping isolation layer and/or the barrier layer being a SiGe alloy or SiGeSn alloy, and the channel layer being a GeSn alloy. As the SiGe/GeSn/SiGe quantum well structure is used, carrier delivery is limited, and as a stress is introduced through lattice mismatch, the carrier mobility is improved, thereby enhancing the device drive capability to adapt to a high-speed high-frequency application.</p> |
申请人 |
INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OFSCIENCES |
发明人 |
MA, XIAOLONG;YIN, HUAXIANG;XU, SEN;ZHU, HUILONG |