发明名称 A DAISY CHAIN ARRANGEMENT OF NON-VOLATILE MEMORIES
摘要 A Flash memory system is implemented in a system-in-package (SIP) enclosure, the system comprising a Flash memory controller and a plurality Flash memory devices. A SIP relates to a single package or module comprising a number of integrated circuits (chips). The Flash memory controller is configured to interface with an external system and a plurality of memory devices within the SIP. The memory devices are configured in a daisy chain cascade arrangement, controlled by the Flash memory controller through commands transmitted through the daisy chain cascade.
申请公布号 KR101365827(B1) 申请公布日期 2014.02.20
申请号 KR20137012902 申请日期 2007.03.26
申请人 发明人
分类号 G06F13/16;G06F13/38;G11C7/20;G11C16/06 主分类号 G06F13/16
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