发明名称 MEMORY ADDRESS TRANSLATION METHOD FOR FLASH STORAGE SYSTEM
摘要 A memory address translation method for flash storage system is disclosed. There are two level mapping tables to reduce overhead of mapping table management. In level-one mapping table, each entry contains two kinds of information, which one is the validation of this entry, called Valid Mark and the other is the location of level-two mapping. The level-one mapping table is always located on RAM, and never saved into flash memory. In level-two mapping table, each entry contains two kinds of information, which one is the validation of this entry and the other is the physical location of data in flash memory. The physical addresses of both data and level-two mapping table are dynamically determined. Level-two mapping table is loaded to RAM when it is needed to reference, and is saved into flash memory periodically if the content is updated.
申请公布号 US2014052899(A1) 申请公布日期 2014.02.20
申请号 US201213589124 申请日期 2012.08.18
申请人 NAN YEN CHIH 发明人 NAN YEN CHIH
分类号 G06F12/02 主分类号 G06F12/02
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