发明名称 METHOD AND APPARATUS FOR MODELLING A POWER CONSUMPTION IN INTEGRATED CIRCUIT
摘要 The present invention relates to a method for modeling power consumption of an integrated circuit and a device for supporting the same. The method for modeling power consumption of an integrated circuit according to the embodiment of the present invention comprises the steps of identifying information on a clock gating enable signal of an integrated circuit; determining a modeling level using a change rate of the number of the clock gating enable signal; and extracting power status according to the modeling level and the number of the clock gating enable signal to model power consumption for the power status. The present invention is able to define power status by only the number of a clock gating enable signal, thereby promptly and exactly predict dynamic power consumption. [Reference numerals] (310) Acquire CGEN information; (320) Determine a modeling accuracy level; (330) Define a first power status using the number of CGEN; (340) Define a second power status by considering the undefined power status; (350) Measure power consumption of an integrated circuit device based on the power status; (AA) Start; (BB) End
申请公布号 KR20140020404(A) 申请公布日期 2014.02.19
申请号 KR20120086647 申请日期 2012.08.08
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK, JI HWAN
分类号 G01R21/00 主分类号 G01R21/00
代理机构 代理人
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