A method and compilation apparatus for selecting a data layout providing the optimum performance for a target processor using a SIMD scheme

摘要

A method and compilation apparatus for selecting a data layout, from among a plurality of data formats supported by an execution apparatus used to execute a binary code, providing the optimum performance for a target processor using SIMD scheme. The compilation apparatus contains analyzers generating a binary code for a particular data layout. A comparator compares the generated binary codes and selects the most performant one. The data layouts can be scalars, structure of arrays or array of structures. The execution apparatus may execute the binary code provided by the compilation apparatus.