发明名称 |
Architecture and programming in a parallel processing environment with switch-interconnected processors |
摘要 |
An integrated circuit includes a plurality of tiles. Each tile includes a pipelined processor configured to process multiple streams of instructions for the processor; and a switch including switching circuitry to forward data over data paths from other tiles to one or more pipeline stages of the processor and to switches of other tiles. At least some of the data is forwarded based on one or more streams of instructions for the switch. |
申请公布号 |
US8656141(B1) |
申请公布日期 |
2014.02.18 |
申请号 |
US20050302956 |
申请日期 |
2005.12.13 |
申请人 |
AGARWAL ANANT;MASSACHUSETTS INSTITUTE OF TECHNOLOGY |
发明人 |
AGARWAL ANANT |
分类号 |
G06F15/00 |
主分类号 |
G06F15/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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